1 #ifndef M4RI_M4RI_CONFIG_H
2 #define M4RI_M4RI_CONFIG_H
5 #define __M4RI_HAVE_MM_MALLOC 0
6 #define __M4RI_HAVE_POSIX_MEMALIGN 1
7 #define __M4RI_HAVE_SSE2 0
8 #define __M4RI_HAVE_OPENMP 1
9 #define __M4RI_CPU_L1_CACHE 0
10 #define __M4RI_CPU_L2_CACHE 0
11 #define __M4RI_CPU_L3_CACHE 0
12 #define __M4RI_DEBUG_DUMP (0 || 0)
13 #define __M4RI_DEBUG_MZD 0
14 #define __M4RI_HAVE_LIBPNG 1
16 #define __M4RI_CC "gcc -Wl,--as-needed"
17 #define __M4RI_CFLAGS " -fopenmp -O2 -g -march=armv6 -mfloat-abi=hard -mfpu=vfp"
18 #define __M4RI_SIMD_CFLAGS ""
19 #define __M4RI_OPENMP_CFLAGS "-fopenmp"
22 #define __M4RI_USE_MM_MALLOC (__M4RI_HAVE_MM_MALLOC && __M4RI_HAVE_SSE2)
23 #define __M4RI_USE_POSIX_MEMALIGN (__M4RI_HAVE_POSIX_MEMALIGN && __M4RI_HAVE_SSE2)
24 #define __M4RI_DD_QUIET (0 && !0)
26 #endif // M4RI_M4RI_CONFIG_H